cbatten

aws-fpga

ece2400-S01-linux-git

My awesome repo

ece2400-sec2

ECE 2400 Section 2

ece2400-sec4-c-debug-coverage

ece4750-tinyrv-isa

ECE 4750 Tiny RISC-V ISA Manual

ece4750-tut-pure-verilog

Pure-Verilog ECE 4750 tutorial from 2014

ece4750-tut3-pymtl

ECE 4750 Tutorial 3: PyMTL Hardware Modeling Framework

ece4750-tut4-verilog

ECE 4750 Tutorial 4: Verilog Hardware Description Language

x

Code to hold miscellaneous code snippets from LaTex documents.

cbatten/ece4750-tinyrv-isa

ECE 4750 Tiny RISC-V ISA Manual

cbatten/ece4750-tut-pure-verilog

Pure-Verilog ECE 4750 tutorial from 2014

cbatten/aws-fpga

cbatten/x

Code to hold miscellaneous code snippets from LaTex documents.

cbatten/ece2400-S01-linux-git

My awesome repo

cbatten/ece2400-sec2

ECE 2400 Section 2

cbatten/ece2400-sec4-c-debug-coverage

cbatten/ece4750-tut3-pymtl

ECE 4750 Tutorial 3: PyMTL Hardware Modeling Framework

cbatten/ece4750-tut4-verilog

ECE 4750 Tutorial 4: Verilog Hardware Description Language

cbatten/test-pages

cbatten/y

Code to hold miscellaneous code snippets from PyMTL tutorial.

cbatten/cbatten-scripts

Helper scripts

cbatten/coremark

CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).

cbatten/craft-certus-ip

cbatten/csmore-verilog

CS More Verilog Labs

cbatten/curie-code

Code for CURIE Academy 2014

cbatten/curie-docs

Documentation for CURIE Academy 2014

cbatten/ece2400-sec1

ECE 2400 Section 1

cbatten/ece2400-sec4

ECE 2400 Section 4

cbatten/ece2400-tut2-git

ECE 2400 Tutorial 2: Git Distributed Version Control System

cbatten/ece5745-tut2-git

ECE 5745 Tutorial 2: Git Distributed Version Control System

cbatten/github-actions-pymtl3

GitHub Actions Demo

cbatten/pymtl-wire-to-wire

Test for wire-to-wire connectivity

cbatten/rtd-wiki

Read the Docs based Wiki

cbatten/verilog-sl

Switch-level modeling with Verilog

cbatten/virtual-winter-festival-2022