/dvb-csa-hardware-implementation

DVB Common Scrambling Algorithm - VHDL synthesizable implementation

Primary LanguageVHDLMIT LicenseMIT

DVB-CSA algorithm hardware implementation

This repository contains hardware implementation of DVB-CSA algorithm (used in digital television) written in VHDL. Source code is synthesizable and divided into three components:

  • Block Cipher
  • Stream Cipher
  • Main Control Unit - which combines the above subcomponents

Each component has its own test bench.

License MIT. You can reuse this code, but please add a link to this repo.