Please read this to understand the design.
To build the design and run sims with Verilator:
make all
To open waves with gtkwave:
make wave
To build for Xilinx FPGA Kintex 7:
make fpga
Please read this to understand the design.
To build the design and run sims with Verilator:
make all
To open waves with gtkwave:
make wave
To build for Xilinx FPGA Kintex 7:
make fpga