Pinned Repositories
Bigdata-Processing-Lab
Big Data Processing: Comprehensive Experiments
Cache-Simulator
Cmm-Compiler
a simple compiler designed to translate language c minus minus to mips instruction.We will finally run the produced mips program in SPIM emulator
Experiments-in-Network
Including experiments I conducted in the course "Experiments in Network" at Nanjing University
hotBPF
Monocycle_CPU_MIPS
a simple monocycle cpu based on mips instruction set, which served as a part of course 'computer organization and design'
NEMU
NJU Emulator , QEMU's abbreviation,which is based on x86 instruction set.
SLAKE
testbench4mips
w2l
chenyueqi's Repositories
chenyueqi/SLAKE
chenyueqi/w2l
chenyueqi/hotBPF
chenyueqi/Cmm-Compiler
a simple compiler designed to translate language c minus minus to mips instruction.We will finally run the produced mips program in SPIM emulator
chenyueqi/Bigdata-Processing-Lab
Big Data Processing: Comprehensive Experiments
chenyueqi/Monocycle_CPU_MIPS
a simple monocycle cpu based on mips instruction set, which served as a part of course 'computer organization and design'
chenyueqi/NEMU
NJU Emulator , QEMU's abbreviation,which is based on x86 instruction set.
chenyueqi/testbench4mips
chenyueqi/Cache-Simulator
chenyueqi/Experiments-in-Network
Including experiments I conducted in the course "Experiments in Network" at Nanjing University
chenyueqi/gpgpu-sim_distribution
GPGPU-Sim provides a detailed simulation model of a contemporary GPU (such as NVIDIA's Fermi and GT200 architectures) running CUDA and/or OpenCL workloads and now includes an integrated (and validated) energy model, GPUWattch.
chenyueqi/Othello-Based-FileSystem
simulation experiment of multi-datacenters distributed file system based on othello
chenyueqi/PipeLine_CPU_MIPS
A complete pipeline based on mips instruction.
chenyueqi/samples
DARPA Cyber Grand Challenge Sample Challenges
chenyueqi/Sub-unit_CPU_ARM
necessary sub-unit of a cpu based on ARM instruction set , including registers , alu and barrel shifter