chiranthsiddappa/caf_verilog

Issues

• Output files for Re-Ingest of Quanitized Computations

  #9 opened 10 months ago by chiranthsiddappa
  0

• Start and Stop Output in Testbenches

  #8 opened 10 months ago by chiranthsiddappa
  0

• ArgMax

  #7 opened 5 years ago by chiranthsiddappa
  0

• Prepend dictionaries with the class name

  #5 opened 5 years ago by chiranthsiddappa
  0

• Port Mismatch in XCorr

  #4 opened 5 years ago by chiranthsiddappa
  0

• Call write_module Explicitly

  #3 opened 5 years ago by chiranthsiddappa
  0

• Quarter Sine Lookup

  #2 opened 5 years ago by chiranthsiddappa
  0

• SigGen LUT Size Table

  #1 opened 5 years ago by chiranthsiddappa
  0