Pinned Repositories
32bit_RISC-V
RV32I指令集的32bit RISC-V处理器
blog
Time waits for no one.
casnode
Open-Source Forum and Social Platform, Alternative to StackOverflow & Flarum
flex-bison-rust
Santiago is a lexing and parsing toolkit for Rust
fpga-drive-aximm-pcie
Example designs for FPGA Drive FMC
from_coder_to_expert
2019年最新总结,从程序员到CTO,从专业走向卓越,分享大牛企业内部pdf与PPT
jstraining
全栈工程师培训材料
PomeloWikiBackup
官网不靠谱,自己动手丰衣足食
The-Art-Of-Programming-By-July
本项目曾冲到全球第一,干货集锦见本页面最底部,另完整精致的纸质版《编程之法:面试和算法心得》已在京东/当当上销售
tinyriscv
A very simple and easy to understand RISC-V core.
cisen's Repositories
cisen/flex-bison-rust
Santiago is a lexing and parsing toolkit for Rust
cisen/Colorlight-FPGA-Projects
current focus on Colorlight i5 and i9 module
cisen/Cores-SweRV
SweRV EH1 core
cisen/EDA-wiki
EDA wiki
cisen/english-training
cisen/FileCentipede
Cross-platform internet download manager for HTTP(S), FTP(S), magnet-link, BitTorrent, ed2k, and online videos
cisen/FPGA-USB-Device
FPGA-based USB-device controller to implement USB-CDC, USB-HID, etc.
cisen/ics-pa-gitbook
cisen/Light-HLS-xilinx-vivado-fpga-llvm
Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)
cisen/LiME_SWERVOLF
cisen/llvm-ir-tutorial-rust
LLVM IR入门指南
cisen/lowcode-engine
An enterprise-class low-code technology stack with scale-out design / 一套面向扩展设计的企业级低代码技术体系
cisen/lowcode-engine-ext
An enterprise-class low-code technology stack with scale-out design / 一套面向扩展设计的企业级低代码技术体系
cisen/nano-cpu32k
Superscalar out-of-order RISC core (with Cache& MMU) and SoC, supporting GNU toolchain & Linux 4.20 kernel, having been verified on Xilinx Kintex-7 FPGA.
cisen/noxueui
不学网前端,rust+yew开发
cisen/open-nic-shell
OpenNIC Shell includes the HDL source files
cisen/open_eFPGA
cisen/PDFPatcher
PDF补丁丁
cisen/platform-chipsalliance
CHIPS Alliance: development platform for PlatformIO
cisen/project-rivera-villamizar
cisen/RFSoC_Controller_V2-FIFO
Version 2 of RFSoC_Controller
cisen/riscv-card
An unofficial assembly reference for RISC-V.
cisen/riscv-swerv
cisen/rust-jtag
JTAG abstraction library for Rust
cisen/sourcecode-SimpleCache
Simple cache design implementation in verilog
cisen/SVG-Loaders
Loading icons and small animations built with pure SVG.
cisen/SweRV_FPGA
SweRV FPGA design of Vivado
cisen/usb_phy_verif
cisen/video-sdk
cisen/XilinxBoardStore