coconut-yc

coconut-yc's Stars

• hwanz/SSR-V2ray-Trojan

  机场推荐与机场评测

  3.4k89

• chicolucio/truth-table-generator

  truth-table-generator is a tool that allows to generate a truth table

  Language:Python7717

• pulp-platform/FlooNoC

  A Fast, Low-Overhead On-chip Network

  Language:SystemVerilog11618

• PyQt5/PyQt

  PyQt Examples（PyQt各种测试和例子） PyQt4 PyQt5

  Language:Python6.6k1.9k

• mehdihadeli/awesome-software-architecture

  🚀 A curated list of awesome articles, videos, and other resources to learn and practice software architecture, patterns, and principles.

  7.8k617

• bespoke-silicon-group/basejump_stl

  BaseJump STL: A Standard Template Library for SystemVerilog

  Language:SystemVerilog50097

• Z-Siqi/Clash-for-Windows_Chinese

  clash for windows汉化版. 提供clash for windows的汉化版, 汉化补丁及汉化版安装程序

  Language:JavaScript20.1k2.7k

• nextflow-io/nextflow

  A DSL for data-driven computational pipelines

  Language:Groovy2.7k621

• pditommaso/awesome-pipeline

  A curated list of awesome pipeline toolkits inspired by Awesome Sysadmin

  6.1k625

• snakemake/snakemake

  This is the development home of the workflow management system Snakemake. For general information, see

  Language:HTML2.2k545

• IBMSpectrumComputing/lsf-python-api

  Location for the LSF Python wrapper for controlling all things LSF

  Language:SWIG10365

• liyanqing1987/lsfMonitor

  A toop for LSF data-collection, data-analysis and information display.

  Language:Python3411

• weewx/weewx

  WeeWX code repository

  Language:Python1k297

• pyuvm/pyuvm

  The UVM written in Python

  Language:Python36069

• cocotb/cocotb

  cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

  Language:Python1.7k502

• fogleman/sdf

  Simple SDF mesh generation in Python

  Language:Python1.6k130

• VUnit/vunit

  VUnit is a unit testing framework for VHDL/SystemVerilog

  Language:VHDL721258

• NVIDIA/NeMo

  A scalable generative AI framework built for researchers and developers working on Large Language Models, Multimodal, and Speech AI (Automatic Speech Recognition and Text-to-Speech)

  Language:Python11.5k2.4k

• 0voice/kernel_memory_management

  总结整理linux内核的内存管理的资料，包含论文，文章，视频，以及应用程序的内存泄露，内存池相关

  963294

• UtopianFuture/UtopianFuture.github.io

  Language:C103

• OSCPU/NutShell

  RISC-V SoC designed by students in UCAS

  Language:Scala1.4k235

• riscvarchive/riscv-cores-list

  RISC-V Cores, SoC platforms and SoCs

  821202

• pConst/basic_verilog

  Must-have verilog systemverilog modules

  Language:Verilog1.6k369

• cclienti/svmodule

  SystemVerilog & Verilog Module I/O parser and printer

  Language:Python254

• recogni/svlib

  svlib from http://www.verilab.com/resources/svlib/

  Language:SystemVerilog197

• chipsalliance/verible

  Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

  Language:C++1.3k200

• accellera-official/systemc

  SystemC Reference Implementation

  Language:C++470149

• intel/npu-nn-cost-model

  Library for modelling performance costs of different Neural Network workloads on NPU devices

  Language:C++221

• Fechin/reference

  ⭕ Share quick reference cheat sheet for developers.

  Language:EJS6.1k838

• jaywcjlove/reference

  为开发人员分享快速参考备忘清单(速查表)

  Language:Dockerfile11.9k1.8k