Board file for Genesys ZU can be found at Digilent's repository. (https://github.com/Digilent/vivado-boards/tree/master/new/board_files).
Each project has a script associated to him. For create the project, init Vivado in tcl mode, and the execute the selected script.
cd script/2020.1
vivado -mode tcl -source ./<tcl_name>.tcl
or
cd script/2019.1
vivado -mode tcl -source ./<tcl_name>.tcl
Projects in this repository are designed to run in Genesys ZU board from Digilent,
This repository include a python script for generate .mem files. Files generated by script are saved in /memory_content directory.
zu_goertzel_rtu.tcl
This project uses the PL to implement a driver for the ZMOD ADC at 100MHz. In the PS, RTU execute a goertzel algorithm to detect a 30Mhz harmonic.
z7_fsk_modulation.tcl This script generate a project for Eclypse Z7 board for generate a design that generate a fsk modulation with 3 different frequencies, one base of 3MHz, on mid frequency of 15MHz and one high of 30MHz.
For more detailed explanation, visit https://www.controlpaths.com
Project is uploaded to https://www.hackster.io/pablotrujillojuan
Script for generate block design only available for Vivado 2019.1 and 2020.1. If you use different version, you can find a image of block design in /doc folder.
If you need more information, yo can contact me on my email pablo@controlpaths.com