CPU Pipeline Simulation
A project completed for David Hathaway's Computer Architecture (CS 222, UVM, Spring 2015)
The goal of this project is to construct a configurable pipeline simulator which takes a trace file and then provides an output file which describes the operations of the simulation
The files contained in this project are:
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GeneratedOutputs/: Contains output files generated by running the simulation, contains runtime statistics as well as which config and trace were used in the simulation.
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SampleOutputs/: Contains sample output files provided by the instructor (David Hathaway) for comparison.
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Source/: Contains the .cpp and .hpp files which define the simulation.
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LISCENSE.md: Describes the reuse and redistribution policy related to the software and other files contained in this project.
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postProjectAnalysis.txt: A write-up which describes some difficulties encountered during the development of the project and some analysis of the behavior of the simulation under varying conditions.
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README.md: Provides basic information about the project as well as descriptions of the files and folders contained within.
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run.sh: A shell script which compiles and executes the code, included for conveneince.
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specifications.txt: The specifications provided by the instructor when the project was assigned.
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Traces.zip: A compressed directory containing the trace files which are passed into the simulation.