danb127/PIO-Chip-Design
A team project involving the design, simulation, implementation, and demonstration of a Parallel I/O (PIO) chip using a Xilinx Artix-7 FPGA chip. The goal was to replicate a segment of the Intel i82C55A chip.
TclGPL-3.0
A team project involving the design, simulation, implementation, and demonstration of a Parallel I/O (PIO) chip using a Xilinx Artix-7 FPGA chip. The goal was to replicate a segment of the Intel i82C55A chip.
TclGPL-3.0