danielkasza

Michigan

Pinned Repositories

9444
9444 RISC-V 64IMA CPU and related tools and peripherals.
Language:C25 2 37
9444-buildroot
Buildroot 2020.02 with support for the 9444 CPU
Language:Makefile31
brainfucore
Brainfuck processor in Verilog.
Language:Python10
chisel-formal
Language:Scala00
dank-formal
Experimental library for formal verification of Chisel modules using SymbiYosys
Language:Scala21
fracking
Real-time fractal renderer with web interface
Language:HTML00
gxemul-tap
GXemul with TAP network interface
Language:C++20
httpasm
The world's crappiest webserver and TCP/IP stack written in MIPS assembly.
Language:Assembly00
lcore
Tiny pipelined 16b CPU
Language:SystemVerilog10
lcore-tools
Tools for LCORE
Language:C00

danielkasza's Repositories

danielkasza/9444
9444 RISC-V 64IMA CPU and related tools and peripherals.
Language:C25 2 37
danielkasza/9444-buildroot
Buildroot 2020.02 with support for the 9444 CPU
Language:Makefile31
danielkasza/dank-formal
Experimental library for formal verification of Chisel modules using SymbiYosys
Language:Scala21
danielkasza/gxemul-tap
GXemul with TAP network interface
Language:C++20
danielkasza/brainfucore
Brainfuck processor in Verilog.
Language:Python10
danielkasza/lcore
Tiny pipelined 16b CPU
Language:SystemVerilog10
danielkasza/chisel-formal
Language:Scala00
danielkasza/fracking
Real-time fractal renderer with web interface
Language:HTML00
danielkasza/httpasm
The world's crappiest webserver and TCP/IP stack written in MIPS assembly.
Language:Assembly00
danielkasza/lcore-tools
Tools for LCORE
Language:C00
danielkasza/tiny-ext2-library
Tiny read-only Ext2 filesystem library
Language:C