Floating point and interrupts omitted, at least for now.
See https://people.inf.ethz.ch/wirth/FPGA-relatedWork/RISC https://people.inf.ethz.ch/wirth/FPGA-relatedWork/RISC-Arch.pdf
Floating point and interrupts omitted, at least for now.
See https://people.inf.ethz.ch/wirth/FPGA-relatedWork/RISC https://people.inf.ethz.ch/wirth/FPGA-relatedWork/RISC-Arch.pdf