darius/wirth-a-risc

Wirth's RISC machine in software

Wirth's RISC machine emulated in C

Floating point and interrupts omitted, at least for now.

See https://people.inf.ethz.ch/wirth/FPGA-relatedWork/RISC https://people.inf.ethz.ch/wirth/FPGA-relatedWork/RISC-Arch.pdf