daveshah1

moving to @gatecat

Pinned Repositories

DSITx
MIPI DSI transmitter core for Xilinx FPGAs (work in progress)
Language:KiCad81 15 229
ElasticC
lightweight open HLS for FPGA rapid prototyping
Language:C++20 5 82
openMixR
4k Mixed Reality headset
Language:VHDL37 9 013
RFToolSDR
AD9361 based USB3 SDR
Language:VHDL101 15 229
up5k-demos
ice40 UltraPlus demos
Language:Verilog24 6 118
BreadboardSim
Circuit Simulator with Breadboard UI
Language:C#91 5 629
CSI2Rx
Open Source 4k CSI-2 Rx core for Xilinx FPGAs
Language:VHDL393 39 6106
prjoxide
Documenting Lattice's 28nm FPGA parts
Language:Python142 18 2014
nextpnr
nextpnr portable FPGA place and route tool
Language:C++1.4k 73 456251
prjtrellis
Documenting the Lattice ECP5 bit-stream format.
Language:Python410 33 7188

daveshah1's Repositories

daveshah1/up5k-demos
ice40 UltraPlus demos
Language:Verilog24 6 118
daveshah1/hilotof
HiLoTOF -- Hardware-in-the-Loop Test framework for Open FPGAs
Language:Verilog12 4 03
daveshah1/nextpnr
nextpnr portable FPGA place and route tool
Language:C++12 5 0
daveshah1/pmods
PMODs primarily for demo usage with icestorm
Language:Verilog9 5 04
daveshah1/flow-examples
Misc open FPGA flow examples
Language:Coq8 4 0
daveshah1/yoloRISC
porting lowRISC to yosys/nextpnr/trellis on the Lattice ECP5 fpga
Language:Verilog6 3 01
daveshah1/icestorm
Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)
Language:Python5 6 0
daveshah1/linux-on-litex-vexriscv
Experiments with Linux on LiteX-VexRiscv
Language:Verilog3 4 01
daveshah1/icestorm-fpl
Icestorm workshop at FPL 2019
Language:Coq2 3 0
daveshah1/yosys
Yosys Open SYnthesis Suite
Language:C++2 4 0
daveshah1/formal-fpl
Language:Verilog1 2 0
daveshah1/litex-linux-riscv
Language:C1 5 0
daveshah1/prjtrellis
Documenting the Lattice ECP5 bit-stream format.
Language:Verilog1 4 0
daveshah1/prjuray
Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
Language:SystemVerilog1 2 0
daveshah1/tiler_rotate_shim
OMAP5 OpenGL rotation shim for Pyra
Language:C1 4 0
daveshah1/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
Language:Assembly1 3 02
daveshah1/VexRiscv-verilog
Using VexRiscv without installing Scala
Language:Verilog1 3 01
daveshah1/Craft
A simple Minecraft clone written in C using modern OpenGL (shaders).
Language:C2 0
daveshah1/dri3wsegl
DRI3 WSEGL plugin for PVR driver
Language:C2 0
daveshah1/gl4es
GL4ES is a OpenGL 2.1/1.5 to GL ES 2.0/1.1 translation library, with support for Pandora, ODroid, OrangePI, CHIP, Raspberry PI, Android, Emscripten and AmigaOS4.
Language:C2 0
daveshah1/litedram
Small footprint and configurable DRAM core
Language:Python2 0
daveshah1/litehyperbus
Small footprint and configurable HyperBus core
Language:Python2 0
daveshah1/litex
Build your hardware, easily!
Language:Python3 0
daveshah1/litex-boards
LiteX boards files
Language:Python2 0
daveshah1/mame
MAME
Language:C++3 0
daveshah1/prjxray
Documenting the Xilinx 7-series bit-stream format.
Language:Coq2 01
daveshah1/prjxray-db-7020
Project X-Ray Database: XC7 Series
Language:Shell2 0
daveshah1/RapidWright
Build Customized FPGA Implementations for Vivado
Language:Java2 0
daveshah1/versa_ecp5_dram
Language:Python3 02
daveshah1/wgpu-rs
Rust bindings to wgpu native library
Language:Rust2 0