dbloong

Pinned Repositories

3399pro_rtsp
mpp+h264+rga+live555++opencv+rtsp
Language:C++0 0 00
AeroQuad
AeroQuad Flight Software
Language:C0 2 00
AlteraPCIe
Linux Driver for Altera PCI Express
Language:C0 0 00
android-jamod-TCP
An update on the open source Jamod Modbus library with reduced serial code and added features for TCP
Language:Java0 2 00
AndroidS7Manager
[HEH Project] An Android app that manage a S7 PLC that fill bottles of pills and check and control the level of liquid.
Language:Java0 2 00
ao486_MiSTer
ao486 port for MiSTer
Language:Verilog0 1 00
Arch_Max
Language:Eagle0 1 00
ArduRoller
Code and assets for my ArduRoller balancebot
Language:C1 0 00
Main_MiSTer
Main MiSTer binary and Wiki
Language:C++1 1 00
sgdma-pcie-driver-demo
Language:C1 0 00

dbloong's Repositories

dbloong/cdpga
FPGA core boards / evaluation boards based on CDCTL hardware
Language:Verilog0 0
dbloong/CS-TTD
Triplet Transformer for Compressive Hyperspectral Target Detection
dbloong/DDR-SDRAM-
DESIGN AND VERIFICATION OF DDR SDRAM MEMORY CONTROLLER USING SYSTEMVERILOG FOR HIGHER COVERAGE
dbloong/domain_controller_orin_x2_tc397
Language:C0 0
dbloong/EagleSDR-Pi
EagleSDR Pi is a single board SDR Pplatform. It includes a Xilinx Zynq-7020, AD9363/AD9361/AD9364, 512 MByte DDR3L memory, USB OTG port, USB-JTAG/UART port, Ethernet port, 16 MByte Flash memory and MicroSD for configuration and operation. The EagleSDR Pi features the Zynq SoC product from Xilinx, which contains an ARM® Cortex®-A9 core. This makes the EagleSDR Pi extremely flexible, allowing users to take advantage of ARM, and possibly the FPGA fabric as well.
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dbloong/FMCW_RADAR
Frequency Modulated Continuous Wave Radar hardware and software design files with 26 dBm output power covering around 250 m.
Language:KiCad Layout0 0
dbloong/FPGA
ISP
dbloong/FPGA-CLAHE
Constrast limited adaptive histogram equlization based on Verilog
dbloong/FPGA-DDR-SDRAM
An AXI4-based DDR1 controller to realize mass, cheap memory for FPGA. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。
dbloong/iicmb
dbloong/ImageSignalProcessing_C
ISP image signal processor implementation in C function
Language:C++0 0
dbloong/Lightweight-and-Real-Time-Infrared-Image-Processor
This is the attach codes (Xilinx Verilog HDL Project and Matlab) for the paper "Lightweight and Real-Time Infrared Image Processor Based on FPGA". Note that only a part of the whole design is released. The other codes are reserved due to the protection of trade secrets.
dbloong/ODrive
High performance motor control
dbloong/PlutoSDR
BR2_EXTERNAL framework for Analog Device's PlutoSDR Zynq
Language:Shell1 0
dbloong/RADAR_24GHZ_NEURAL_NETWORK
Python Radar record parse, fft video and waterfall plot and Matlab object type detection using neural network classification algorithm.
Language:Python0 0
dbloong/riffa
The RIFFA development repository
Language:Verilog0 0
dbloong/rtsp_demo
基于标准C库实现嵌入式RTSP服务器
Language:C0 0
dbloong/RtspServer
RTSP Server , RTSP Pusher
Language:C++0 0
dbloong/sdi-mipi-bridge
Antmicro's open source 3G SDI into MIPI CSI-2 converter
Language:Shell0 0
dbloong/sdi-mipi-bridge-fpga-design
Language:Python0 0
dbloong/sdi-mipi-bridge-hw
Antmicro's open hardware 3G SDI into MIPI CSI-2 converter
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dbloong/sdi-mipi-bridge-linux
Language:C0 0
dbloong/sdk-zephyr
NCS downstream of https://github.com/zephyrproject-rtos/zephyr
Language:C1 0
dbloong/storm32bgc
3-axis Brushless Gimbal Controller, based on STM32 32-bit microcontroller
Language:C++0 0
dbloong/verilog
dbloong/verilog-uart
Verilog UART
dbloong/WRTD-FMC-ADC
White Rabbit Trigger Distribution (WRTD) of the Analog to Digital Converter (ADC) peripheral of the SPEC150T board
Language:HTML1 0
dbloong/Xmodem6
an XMODEM implementation for Win-i386/amd64 command-prompt
Language:C0 0
dbloong/zynq_cam_isp_demo
基于verilog实现了ISP图像处理IP
Language:VHDL0 0
dbloong/zynqmp_cam_isp_demo
ISP-Lite, VIP, MIPI-RX IP实现，测试平台为KV260+AR1335 3MP@30fps
Language:VHDL0 0