dea1ka

dea1ka's Stars

• jobisoft/jTDC

  FPGA based 30ps RMS TDCs

  Language:VHDL7611226

• RuiMachado39/TDC

  Verilog implementation of a tapped delay line TDC

  Language:Verilog363411

• ChinaQMTECH/CYCLONE_IV_EP4CE15

  243011