debs-sifive

@sifive

Pinned Repositories

chisel
Chisel: A Modern Hardware Design Language
Language:Scala4k 150 1.1k595
chisel-template
A template project for beginning new Chisel work
Language:Scala00
chisel3
Chisel 3: A Modern Hardware Design Language
Language:Scala00
circt
Circuit IR Compilers and Tools
Language:C++00
firrtl
Flexible Intermediate Representation for RTL
Language:Scala00
firrtl-spec
The specification for the FIRRTL language
Language:TeX00
riscv-compliance
Language:Assembly00
riscv-v-spec
Working draft of the proposed RISC-V V vector extension
00
rocket-chip
Rocket Chip Generator
Language:Scala00
www.chisel-lang.org
The home of the Chisel3 website
Language:Makefile00

debs-sifive's Repositories

debs-sifive/chisel-template
A template project for beginning new Chisel work
Language:Scala00
debs-sifive/chisel3
Chisel 3: A Modern Hardware Design Language
Language:Scala00
debs-sifive/circt
Circuit IR Compilers and Tools
Language:C++00
debs-sifive/firrtl
Flexible Intermediate Representation for RTL
Language:Scala00
debs-sifive/firrtl-spec
The specification for the FIRRTL language
Language:TeX00
debs-sifive/riscv-compliance
Language:Assembly00
debs-sifive/riscv-v-spec
Working draft of the proposed RISC-V V vector extension
00
debs-sifive/rocket-chip
Rocket Chip Generator
Language:Scala00
debs-sifive/www.chisel-lang.org
The home of the Chisel3 website
Language:Makefile00