Arduino FDX-B Reader

DIY ISO 11784/11785 FDX-B RFID Reader

The goal of this project is to create hardware/software capable of reading RFID tags implanted in animals. Only tags that use the FDX-B protocol are supported since they appear to be the most common. Support for HDX protocol based tags would require a significant hardware redesign that I'm unwilling to do at the moment. The EM4100 protocol, that is commonly used by RFID fobs/cards, could be supported with minor changes but that's outside the scope of this project.

Hardware

Open Source Hardware Project
Circuit Simulation

Tools

Oscilloscope
Multimeter (optional)
LCR meter (optional)

Materials

Arduino compatible microcontroller [M1]
LM358P dual op-amp [U1]
PN2222A NPN transistor [Q1]
PN2907A PNP transistor [Q2]
1N4148 fast switching diode [D1]
RFID antenna coil or wind your own with Enamel copper wire (magnet wire) [L1]
Capacitors

quantity	capacitance	location(s)
4	depends on L1	C1, C2, C3, C4
1	100pF	C5
1	330pF	C6
1	4.7nF	C7

Resistors

quantity	resistance	location(s)
1	1kΩ	R1
1	100kΩ	R2
1	51kΩ	R3
1	22kΩ	R4
1	220kΩ	R5
1	4.7kΩ	R6
1	470kΩ	R7
1	10kΩ	R8
1	6.8kΩ	R9

Design

First we want to generate the 134.2kHz carrier frequency for the reader. We can do that by using any of the Arduino's PWM-capable timers to generate a square wave. Arduino timers can only achieve a frequency of 134.4kHz which is close enough for our purposes. The example sketch uses Timer1 to output the square wave on PB1 (Arduino Nano pin 9).

The square wave from the Arduino controls the push-pull amplifier formed by R1, Q1, and Q2. The push-pull amplifier then drives the LC resonator formed by the antenna L1 and its associated tuning capacitors C1, C2, C3, and C4.

The LC resonator will need to be tuned to resonate at the carrier frequency. The resonance frequency of an LC resonator can be calculated with the following formula (online calculator).
$f = \Large \frac{1}{2 \pi \sqrt{L \times C}}$

For example, if we have a 2.8mH antenna coil that we want to resonate at 134.4kHz then the total capacitance of $C1 + C2 + C3 + C4$ should be 500.8pF.
$134.40kHz = \Large \frac{1}{2 \pi \sqrt{2.8mH \times 500.8pF}}$

The closest capacitance that we can easily achieve is $500pF = 220pF + 220pF + 30pF + 30pF$, which is close enough.
$134.51kHz = \Large \frac{1}{2 \pi \sqrt{2.8mH \times 500pF}}$

Tags will be easier to read with a properly tuned LC resonator. Tuning can be judged by measuring the peek-to-peek voltage of the LC resonator. A peek-to-peek voltage 3 to 4 times higher than the supply voltage should be achievable.

With that, we have a device that can supply power to a tag, act as a clock signal, and provide a communication channel. If a tag enters the EM field of the antenna coil then the tag will power up and start modulating its data into the carrier.

Next we need to extract the transmitted data from the carrier. That can be done by passing the signal through series of filters, starting with the envelope detector formed by D1, R2, and C5.

We need to choose values for R2 and C5 that fulfill the following inequality, where $\tau = R \times C$, in order to demodulate the signal without distorting it.
$\Large \frac{1}{f_{carrier}} \normalsize < \tau < \Large \frac{1}{f_{data}}$

The carrier frequency is still 134.4kHz but we need to determine the data signal frequency. According to the FDX-B protocol, the frequency of the data signal is a function of the carrier frequency and the data that is being transmitted. One bit of data is transferred for every 32 carrier cycles and a bit is identifiable by a state transition at the start and end of a bit.
$4.2kHz = \Large \frac{134.4kHz}{32}$
i.e. 4200 kb/s

Additionally, a "0" bit is identified by a state transition in the middle of a bit period. That means that our data signal can change as fast as every 16 carrier cycles and results in a maximum data signal frequency of 8.4kHz.
$8.4kHz = \Large \frac{134.4kHz}{16}$
i.e. 8400 baud

Now we can plug those values into our inequality and determine a value for $\tau$.
$\Large \frac{1}{134.4kHz} \normalsize < \tau < \Large \frac{1}{8.4kHz}$

There are many valid values for $\tau$. In our case, we'll use a value that is a 10_th of the data signal's period.
$\tau = 0.1 \times \Large \frac{1}{8.4kHz} \normalsize = 11.9 \mu s$

Using a 100kΩ resistor and a 100pF capacitor gives us a value that is reasonably close to our chosen $\tau$.
$10\mu s = 100k\Omega \times 100pF$

There is still a lot of high frequency noise from the carrier present in the signal after the envelope detector. To take care of that we can use the low pass filter formed by R3 and C6 to cut off frequencies higher than that of our data signal. We can use the formula for an RC filter to calculate a cutoff point at, or slightly above, the data signal frequency of 8.4kHz.
$f = \Large \frac{1}{2 \pi \times R \times C}$

A 51kΩ resistor and a 330pH capacitor will work well for this.
$9.46kHz = \Large \frac{1}{2 \pi \times 51k\Omega \times 330pH}$

We should have a fairly clean data signal now that the filtering is done, with a clear distinction between the low and high states. All that's left to do is amplify the signal to the logic level of the Arduino. For that, we can use an LM358 dual op-amp with both op-amps in inverting configurations and operating in series.

By first passing the signal through a series capacitor, we can make the signal osculate around the set point of the op-amps. For that reason we will use the voltage divider formed by R8 and R9 to set the non-inverting inputs of the op-amps to a voltage near the midpoint of their output voltage.

We will configure the first op-amp to have a gain of 10 to avoid distorting the data signal.

The second op-amp is arbitrary configured with an further gain of 100.

That gives us a digital signal which is suitable for parsing by an Arduino.

License

GPLv3

decrazyo/fdxb