Need to set up environment first. e.g. source license, mv .synopsys_dc.setup
ncverilog Final_tb.v CHIP.v slow_memory.v +define+hasHazard +access+r
ncverilog Final_tb.v CHIP_BrPred.v slow_memory.v +define+BrPred +access+r
ncverilog Final_tb.v CHIP_compression.v slow_memory.v +define+compression +access+r
ncverilog Final_tb.v CHIP_L2.v slow_memory.v +define+L2Cache +access+r
CHIP_hasHazard.v
use CHIP_complete.v to extend
- three types of instructinos in testbench
a. all not taken.
b. not taken, taken, not taken, taken...
c. all taken. - four types of branch predictors
a. 2-bit predictor v1
b. 2-bit predictor v2
c. branch hash table 1-bit
d. branch hash table 2-bit - use bash script to test 1000 testbenches for each predictor
- CHIP_compress.v
- share L2 cache of I cache and D cache
- try 2-way and direct-mapped cache
- try different size of L2 cache
- use bash script to test 70 testbenches for each setting