doughnutsz

Pinned Repositories

Unicamp-SpringBoot
Language:Java10
abc
ABC: System for Sequential Logic Synthesis and Formal Verification
Language:C00
ABCPaperCheck
Research paper based on or related to ABC.
00
AIG2INV
DeepIC3: Guiding IC3 Algorithms by Graph Neural Network Clause Prediction (ASP-DAC 2024)
Language:C++00
AIGER
Python version of tools to work with AIG formatted files
Language:Jupyter Notebook00
AutoSAT
Language:Python00
circt
Circuit IR Compilers and Tools
Language:C++00
CircuitNet
CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)
Language:Python00
CirSAT
A Circuit_based SAT solver
Language:C++00
CULS
GPU-based logic synthesis tool
Language:C++00

doughnutsz's Repositories

doughnutsz/OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
Language:Verilog
doughnutsz/abc
ABC: System for Sequential Logic Synthesis and Formal Verification
Language:C
doughnutsz/OpenROAD-flow-scripts
OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
Language:Verilog
doughnutsz/pytorch_geometric
Graph Neural Network Library for PyTorch
Language:Python
doughnutsz/yosys
Yosys Open SYnthesis Suite
Language:C++
doughnutsz/verilator
Verilator open-source SystemVerilog simulator and lint system
Language:C++
doughnutsz/circt
Circuit IR Compilers and Tools
Language:C++
doughnutsz/tvm
Open deep learning compiler stack for cpu, gpu and specialized accelerators
Language:Python
doughnutsz/hdlagent
LLM Agent for Hardware Description Language
Language:Python
doughnutsz/taskflow
A General-purpose Parallel and Heterogeneous Task Programming System
Language:C++
doughnutsz/LLM4HWDesign_Starting_Toolkit
LLM4HWDesign Starting Toolkit
Language:Python
doughnutsz/iTraining
Language:C++
doughnutsz/naja
Structural Netlist API (and more) for EDA post synthesis flow development
Language:C++
doughnutsz/egg
egg is a flexible, high-performance e-graph library
Language:Rust
doughnutsz/ABCPaperCheck
Research paper based on or related to ABC.
doughnutsz/HOGA
Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits
Language:Python
doughnutsz/learning_research
本人的科研经验
doughnutsz/iEDA
Language:C++
doughnutsz/eqy
Equivalence checking with Yosys
Language:C++
doughnutsz/sby
SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
Language:Python
doughnutsz/phyLS
A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Verification""
Language:C++
doughnutsz/AutoSAT
Language:Python
doughnutsz/OpenABC
OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph level prediction problems in chip design.
Language:Verilog
doughnutsz/FloorSet
doughnutsz/CULS
GPU-based logic synthesis tool
Language:C++
doughnutsz/LLM101n
LLM101n: Let's build a Storyteller
doughnutsz/diff-SAT
Probabilistic Answer Set Programming and Probabilistic SAT solving, based on Differentiable Satisfiability
Language:Scala
doughnutsz/CircuitNet
CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)
Language:Python
doughnutsz/EDA-wiki
EDA wiki
Language:Shell
doughnutsz/E-Syn
E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)