(No, that's not a typo)
Bit banged USB stack for the RISC-V WCH CH32V003, using ch32v003fun.
WARNING: Project is not ready for prime time. Proof of concept works, we are on track for proper releases soon. Maybe you can help out!
✅ Able to go on-bus and receive USB frames
✅ Compute CRC in-line while receiving data
✅ Bit Stuffing (Works, tested)
✅ Sending USB Frames
✅ High Level USB Stack in C
✅ Make USB timing more precise.
✅ Use SE0 1ms ticks to tune HSItrim
✅ Rework sending code to send tokens/data separately.
✅ Fix CRC Code
❕ Further optimize Send/Receive PHY code. (Please help)
❎ Enable systick-based retiming to correct timing mid-frame.
✅ Optimize high-level stack.
✅ Fit in bootloader (NOTE: Need to tighten more)
❕ Use hardware CRC to save space/time??
✅ Use HID custom messages.
✅ Improve sync sled. I.e. coarse and fine sledding.
✅ Abort on non-8-bit-aligned-frames.
🔳 Fix timing on send, for CRC bits.
🔳 Make minichlink able to use bootloader.
🔳 Make demos
🔳 API For self-flashing + printf from bootloader