eb-sc

@syntacore

Pinned Repositories

scr1
SCR1 is an open-source RISC-V compatible MCU core
Language:SystemVerilog0 1 00
scr1-sdk
open-source SDK for SCR1 core
Language:C0 1 00
lab-riscv-asm
Lab RISC-V asm
Language:Assembly2 2 08
scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
Language:SystemVerilog885 52 58283
scr1-sdk
open-source SDKs for the SCR1 core
Language:C70 24 633

eb-sc's Repositories

eb-sc/scr1
SCR1 is an open-source RISC-V compatible MCU core
Language:SystemVerilog0 1 00
eb-sc/scr1-sdk
open-source SDK for SCR1 core
Language:C0 1 00