emanazakria

Pinned Repositories

• 32-bit-single-cycle-MIPS

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• ALU-testing-environment-using-SystemVerilog

  Build Test-environment for an ALU, this environment includes all component: driver, generator, monitor, virtual interface and scoreboard the processor is simulated on QuestaSim tool.

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• assg_2_hashtables

  Language:C01

• Assigment-Student-Listing-

  Language:C00

• final-project--door-lock-system

  Language:SuperCollider00

• freeRTOS_events_tiva-c

  Language:C00

• freeRTOS_Softwaretimers-on-tiva-c

  Language:C00

• learning-tiva-c

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• Memory-testing-environment-using-UVM-

  Build a full UVM framework of SV classes which is extended from UVM base classes for testing a Memory, this environment includes all components: driver, sequencer, monitor, agent, subscriber and scoreboard.

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• RTL-to-GDS-Implementation-of-Low-Power-Configurable-Multi-Clock-Digital-System

  It is responsible of receiving commands through UART receiver to do different system functions

  Language:Verilog00

emanazakria's Repositories