True Random Number Generator for FPGA. Based on article by Wold and Tan [1].
/
contains the TRNG entity./simulation/
contains a test bench for "stimulating" the TRNG and some .do-files for compiling the simulation files and displaying the waveforms nicely. The .do-macros are run in Modelsim by typingdo <filename.do>
./synthesis/
contains a top for synthesizing the entity in an FPGA.
The degree of randomness is mainly controlled by the number of oscillator rings that are in parallel. There are other factors as well, which [1] explains very nicely.