Check CLK7 usage

[ogamespec]

Run through the topology and compare the HDL implementation all the places where CLK7 (writeback_ext) is used.
This CLK is tied to the overlapped instruction execution mechanism, so it is absolutely critical to check the circuits and add DLatch to make sure they "extend" the results properly (they are essentially shift delay registers)

[ogamespec]

Documented all uses of CLK7 (clk.md) and checked how this CLK is used in HDL. Looks right :)