enjoy-digital/xtrx_julia

Configure Board's PMICs.

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enjoy-digital commented

The XTRX board has PMICs that need to be configured. Figure out the different PMICs of the board and a first valid configuration that could be used.

Useful information for this will probably found in:

The FPGA source just has I2C cores executing the software commands.

The following project could also be useful since seems to reconfigure the PMICs with a custom FPGA design:

enjoy-digital commented

Power Control: https://github.com/xtrx-sdr/libxtrxll/blob/master/xtrxll_base.c#L486-L492

static int _xtrxr3_board_pwr_ctrl(struct xtrxll_base_dev* dev, unsigned param)
{
	int en_lms = (param == PWR_CTRL_ON);
	int en_b33 = (param != PWR_CTRL_PDOWN);

	return lp8758_en(dev, en_lms, en_b33);
}

lp8758_en: https://github.com/xtrx-sdr/libxtrxll/blob/master/xtrxll_base.c#L374-L439
static int lp8758_en(struct xtrxll_base_dev* dev, int en, int en3v3)

{
	int res;
	uint8_t b_ctrl = (en) ? PMIC_CH_ENABLE : PMIC_CH_DISABLE;

	if (en) {
		// BUS 0 -- LMS PMIC
		res = _xtrxllr3_pmic_lms_set(dev, XTRX_PWR_ECONOMY * XTRX_PWR_V_DROP);
		if (res)
			return res;
	}

	if (en3v3) {
		res = lp8758_set(dev, XTRX_I2C_PMIC_LMS, BUCK1_CTRL1, (en3v3) ? PMIC_CH_ENABLE : PMIC_CH_DISABLE);
		if (res)
			return res;

		uint8_t v = 0xff, d = 0xff;
		res = lp8758_get(dev->self, XTRX_I2C_PMIC_LMS, DEV_REV, (uint8_t*)&v);
		if (res)
			return res;
		res = lp8758_get(dev->self, XTRX_I2C_PMIC_LMS, OTP_REV, (uint8_t*)&d);
		if (res)
			return res;
		XTRXLLS_LOG("CTRL", XTRXLL_DEBUG, "%s: PMIC_L ver %02x:%02x  en33=%d\n", dev->id, v, d, en3v3);

		for (unsigned i = 0; i < 50; i++) {
			v = 0xff, d = 0xff;
			res = lp8758_get(dev->self, XTRX_I2C_PMIC_FPGA, DEV_REV, (uint8_t*)&v);
			if (res)
				return res;
			res = lp8758_get(dev->self, XTRX_I2C_PMIC_FPGA, OTP_REV, (uint8_t*)&d);
			if (res)
				return res;
			XTRXLLS_LOG("CTRL", XTRXLL_DEBUG, "%s: PMIC_F ver %02x:%02x\n", dev->id, v, d);
			if (v == 0x01 && d == 0xe0)
				break;
		}
	}


	res = lp8758_set(dev, XTRX_I2C_PMIC_LMS, BUCK0_CTRL1, b_ctrl);
	if (res)
		return res;
	res = lp8758_set(dev, XTRX_I2C_PMIC_LMS, BUCK2_CTRL1, b_ctrl);
	if (res)
		return res;
	res = lp8758_set(dev, XTRX_I2C_PMIC_LMS, BUCK3_CTRL1, b_ctrl);
	if (res)
		return res;

	if (en) {
		// BUS 1 -- FPGA PMIC
		res = _xtrxllr3_io_set(dev, 1800);
		if (res)
			return res;
	}

	if (!en3v3) {
		res = lp8758_set(dev, XTRX_I2C_PMIC_LMS, BUCK1_CTRL1, (en3v3) ? PMIC_CH_ENABLE : PMIC_CH_DISABLE);
		if (res)
			return res;
	}

	return 0;
}
enjoy-digital commented

VIO configuration seems to depends on performance profiles:
https://github.com/xtrx-sdr/libxtrxll/blob/master/xtrxll_base.c#L207-L212:

enum xtrx_vio {
	V_IO_ECO = 1700,
	V_IO_OPT = 2000,
	V_IO_PERF= 2700,
	V_IO_HI  = 3300,
};
enjoy-digital commented

Now seems to be configured correctly with 51dd58d by reusing init sequencer from https://github.com/mazsi-on-xtrx/xtrx-system-test.

This will be replaced with our own code.

enjoy-digital commented

This is now done and integrated in the CPU firmware. Values could eventually be adjusted but current values should allow correct boards operation.

enjoy-digital commented

More info:

U18 Ch0 1.0V VCCINT + 1.0V MGTAVCC
U18 Ch1 1.8V/3.3V VCCIO (DIGPRVDD2/DIGPRVDD3/DIGPRPOC + VDD18_TXBUF of LMS + Bank 0/14/16/34/35 of FPGA)
U18 Ch2 1.2V MGTAVTT + 1.2V VDLMS ( VDD12_DIG / VDD_SPI_BUF / DVDD_SXR / DVDD_SXT / DVDD_CGEN )
U18 Ch3 1.8V VCCAUX  + 1.8V VDLMS ( VDD18_DIG )
U19 Ch0 +2.05V (used as input to 1.8V LDO for LMS analog 1.8V)
U19 Ch1 +3.3V rail
U19 Ch2 +1.75V (used as input to 1.4V LDO for LMS analog 1.4V)
U19 Ch3 +1.5V  (used as input to 1.25V LDO for LMS analog 1.25V)