enjoy-digital

EnjoyDigitalFrance

Pinned Repositories

colorlite
Take control of your Colorlight FPGA board with LiteX/LiteEth :)
Language:Python96 9 814
litedram
Small footprint and configurable DRAM core
Language:Python386 24 163122
liteeth
Small footprint and configurable Ethernet core
Language:Python217 18 6788
litepcie
Small footprint and configurable PCIe core
Language:Python492 29 68120
litesata
Small footprint and configurable SATA core
Language:Python131 18 1734
litescope
Small footprint and configurable embedded FPGA logic analyzer
Language:Python170 16 2342
litesdcard
Small footprint and configurable SDCard core
Language:Python111 14 1335
litex
Build your hardware, easily!
Language:C3.1k 97 835575
pcie_screamer
PCIe Screamer - TLPs experiments...
Language:C166 19 1032
usb3_pipe
USB3 PIPE interface for Xilinx 7-Series
Language:Verilog202 29 2831

enjoy-digital's Repositories

enjoy-digital/litex
Build your hardware, easily!
Language:C3.1k 97 835575
enjoy-digital/litepcie
Small footprint and configurable PCIe core
Language:Python492 29 68120
enjoy-digital/litedram
Small footprint and configurable DRAM core
Language:Python386 24 163122
enjoy-digital/liteeth
Small footprint and configurable Ethernet core
Language:Python217 18 6788
enjoy-digital/litescope
Small footprint and configurable embedded FPGA logic analyzer
Language:Python170 16 2342
enjoy-digital/pcie_screamer
PCIe Screamer - TLPs experiments...
Language:C166 19 1032
enjoy-digital/litesata
Small footprint and configurable SATA core
Language:Python131 18 1734
enjoy-digital/litesdcard
Small footprint and configurable SDCard core
Language:Python111 14 1335
enjoy-digital/colorlite
Take control of your Colorlight FPGA board with LiteX/LiteEth :)
Language:Python96 9 814
enjoy-digital/litex_m2sdr
LiteX based M2 SDR FPGA board.
Language:C73 11 379
enjoy-digital/litex-acorn-baseboard
LiteX development baseboards arround the SQRL Acorn.
Language:Python57 15 119
enjoy-digital/liteiclink
Small footprint and configurable Inter-Chip communication cores
Language:Python54 11 1027
enjoy-digital/litejesd204b
Small footprint and configurable JESD204B core
Language:Python40 4 612
enjoy-digital/litex_rp2040_pmod_test
Test of a RP2040 PMOD attached to a LiteX SoC.
Language:Python24 4 12
enjoy-digital/xtrx_julia
XTRX LiteX/LitePCIe based design for Julia Computing
Language:C24 7 133
enjoy-digital/thunderscope
LiteX based FPGA gateware for Thunderscope.
Language:Python22 7 124
enjoy-digital/litex_hw_ci
LiteX Hardware CI tests.
Language:Python9 4 171
enjoy-digital/openFPGALoader
Universal utility for programming FPGA
Language:C++7 1 01
enjoy-digital/litepcie_ptm_test
LitePCIe PTM support / test repo.
Language:Python5 6 112
enjoy-digital/litex_agilex5_test
Initial Test/Support of LiteX on Intel Agilex5 FPGAs.
Language:Python3 4 16
enjoy-digital/litex_openwrt_test
Test of OpenWRT on LiteX SoCs.
Language:C3 2 2
enjoy-digital/vhdl2doc
Language:JavaScript3 2 0
enjoy-digital/HectaScope
Language:Python2 0 01
enjoy-digital/litex_mister_test
Simplification test of MiSTer with LiteX to try to help/contribute to MiSTeX project.
Language:Verilog2 3 91
enjoy-digital/CTU-CAN-FD
This is a mirror repository for official CTU CAN FD repository:
1
enjoy-digital/LimeSDR-XTRX_LiteX_GW
Language:Python1 0 7
enjoy-digital/litex_64bit_addressing_test
Test/PoC of 64-bit addressing in LiteX.
Language:Python1 3 4
enjoy-digital/litex_xtrx
XTRX LiteX/LitePCIe based alternative Gateware/Software.
Language:C++1
enjoy-digital/openfpga-pong
FPGA Pong implementation, specifically for the Analogue Pocket
Language:Verilog1 1 0
enjoy-digital/openocd
Spen's Official OpenOCD Mirror (no pull requests)
Language:C1 2 01