Pinned Repositories
HellbladeSaver
Simple APP for backing up Hellblade game saves.
humid
Humidity experiment
register_compiler
SystemRDL based register compiler
schema
JSON schema for WaveDrom
VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
svunit
PeakRDL-regblock
Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.
vscode-terosHDL
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
eruanno123's Repositories
eruanno123/register_compiler
SystemRDL based register compiler
eruanno123/HellbladeSaver
Simple APP for backing up Hellblade game saves.
eruanno123/humid
Humidity experiment
eruanno123/schema
JSON schema for WaveDrom