Reference Courses, Papers and Ressources on the topic of: Networking, Operating System , Algorithms, Languages, Computer Architecture and FPGA. Also contains ressources for graduates students.
Table of Contents
- High Speed and Programmable Packet Processing
- Courses and Books
- Papers
- High-Level Synthesis
- High Speed I/O Framework for Software Packet Processing
- Network Traffic Traces
- Developpment Ressources
- Conferences / Journal
- Graduate Students Ressources
Courses and Books
Linux Tools
Git
Learning Git - Interactive schemes.
Networking
Introduction Course on Computer Networks CSCI-UA.0480-009
Graduate Course on Networks and Mobile Systems CSCI-GA.2620-001, with an emphasis on current research challenges in the field of computer networks.
Another computer network course taught at MIT. This is a graduate-level introduction to classic and advanced topics in computer networks.
Advanced Topics in Networking from MIT (2016)
Nick Mckeown Course - Advanced Topics in Networking
If you prefer to watch videos, the content of the course COS 461 - Computer Networking (Princeton) is available on Youtube.
The two following documents are Ph.D thesis.
Efficient Remote Procedure Calls for Datacenters
Designing fast and programmable routers
5G
5G Mobile Networks: A Systems Approach
Blogs and news
OvSorbit a podcast related to OvS (Open vSwitch), an open-source implementation of a distributed virtual multilayer switch. The main purpose of Open vSwitch is to provide a switching stack for hardware virtualization environments, while supporting multiple protocols and standards used in computer networks.
Operating System
-Operating System Concepts is a reference book used in most courses.
-MIT 6.828 Operating System Engeeneering
-UW–Madison Operating Systems: Three Easy Pieces
Algorithms
-Reference book The Algorithm Design Manual
-Design and Analysis of Algorithms CS161
-CS166 Advanced Data Structure
Languages
C++
For modern C++ please use the C++ Core Guidelines, the book "A Tour of C++".
For a more complete list of C++ resources, check Awesome CPP.
Optimizing software in C++: An optimization guide for Windows, Linux,and Mac platforms
Python
Fundamentals of Python Programming
RTL
VHDL
VHDL Language Reference Manual (VHDL 2008)
Verilog and System Verilog
Verilog, Formal Verification and Verilator Beginner's Tutorial. This tutorial has pointers to other tutorials.
Design elements in Verilog (targeting FPGAs)
Modern Hardware Description Languages
See the related projects section on PyRTL. The page covers the following HDL: myHDL, Chisel, PyMTL, Clash.
Paper: A Golden Age of Hardware Description Languages: Applying Programming Language Techniques to Improve Design Productivity Link
Tools
Open source tools (May be outdated. Link).
In particular, CocoTB is of high interest if you want to test your design with a Python testbench.
To have an update on open-source tools, checks the ORConf talks link to conference website
Computer Architecture
Generic
Introduction course for undergrades, or for a refresh. Link to the course material (check also the video on youtube)
(2018) Advanced Course for graduate students. Link to the course material (see also the video on youtube)
Reference books (read in this order): David A Patterson and John L. Hennessy "Computer Organization and Design: the Hardware/Software Interface"
John L. Hennessy and David A Patterson "Computer Architecture: A Quantitative Approach"
Networking
An old (may be outdated) reference to the design of network processors (NPU). High Performance Switches and Routers Please note that NPUs were designed to offer higher processing flexibility over P4-programable data plane (see article below Forwarding Metamorphosis). Hence, NPUs could barely process 200/400 Gbps, while PISA was shown to process Tbps. However, the PISA processing capabilities are restrained over a NPU. PISA is not tailored to process more than 512 bytes of the packet header (no payload processing allowed).
FPGA
Course
Reconfigurable Logic: Technology, Architecture and Applications
Reading List
ACM/SIGDA Technical Committee on FPGAs
Blogs and News
Zipcpu: the blogs covers many classics topics related to FPGA: bus, AXIs, clock domain crossing, PLL, etc. (In Verilog) Front de libération des FPGAs (french)
Tutorials on multiple interfacing protocol (I2C, UART, etc.)
Designing parallel computers and integrated systems-on-chips using FPGAs
Clock Domain Crossing a course about clock domain crossing for bus and signal.
Associative Memory
TCAM on FPGAs Description of the TCAM architecture used by Xilinx Conclusion:
- FPGA are a poor fit for TCAM emulation using the transposed RAM approach.
- The overhead reported (measured as the memory size used divided by the entry size) ranges from 8.4x up to 65.3x.
TCAM and CAM VLSI: Content-Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey
Papers
Router Buffers
Past, present and future perspectiveso on sizing router buffers.
Congestion Control
Only few selected papers are presented here. In particular Datacenter Congestion Control:Identifying what is essential and making it practical presents a good overview of the latest findings and knowledge in this field.
Programmable Switches
A broad selection of papers published on the topic of programmable switches is available here.
A concise version is presented below.
Context
Why programmable switches? The road to Software Defined Networking (SDN)
A cornerstone paper in modern network hardware design? Yes, there is one!
Where Programmable switches fit in the global picture SDN?
An attempt to motivate and clarify Software-Defined Networking (SDN)
Why programmable switches are here to stay? A very good presentation by Nick Mckeown.
Historic Perspective: From Ethane To SDN and Beyond. A brief description on the history behind the Ethane paper and its ultimate evolution into SDN and beyond.
Domain Specific Architecture
The first step toward (limited) programmable switches: OpenFlow First step:
- OpenFlow supports only a fixed set of network protocols.
- Single Match Table model.
From OpenFlow to P4.
- Can we design a reconfigurable and protocol agnostic parser, so that new and future protocols can be parsed without tapping out a new chip?
- Yes! Design Principles for Packet Parsers
What are the missing elements to design a fully programmable switch? Question addressed by the paper Forwarding Metamorphosis: Fast Programmable Match-Action Processing in Hardware for SDN
The architecture presented in this paper is also refered to as PISA: Protocol Independant Switch Architecture.
The Domino paper raises the question of the processing capabilities that sould be integrated in a programable switch (implemented on ASIC). Link to the Domino paper.
While previously presented paper focus on the hardware architecture, the language to program PISA is not addressed here. This is the topic of another paper, P4, see below.
Domain Specific Language
First, we highly recommand you to read the P4 paper.
Then, the tutorial getting started with P4, provided by the P4 Education working group is a good indroduction on P4, and presents examples using the bmv2, the behavioral model for P4. A more complete tutorial on P4 programming is provided on the P4 language repo.
More resources on P4 are available on the P4 Educational Working Group. The latest P4 Specification is available here.
Presentations:
- P4_16
- PSA overview
- and its specification
P4 Compilation
to FPGA
P4FPGA : An open-source P4 compiler for FPGAs (P4 -> BlueSpec). The git repo is no longer maintained. Complete reference: Wang, Han, Robert Soulé, Huynh Tu Dang, Ki Suh Lee, Vishal Shrivastav, Nate Foster, and Hakim Weatherspoon. "P4FPGA: A rapid prototyping framework for P4." In Proceedings of the Symposium on SDN Research, pp. 122-135. ACM, 2017. Link to the paper P4FPGA
Xilinx SDNet. See P4-NetFPGA
to CPU
P4C (P4 Compiler)[https://github.com/p4lang/p4c] compiles P4 programs for the bmv2 (Behavioral Model 2)[https://github.com/p4lang/behavioral-model]. Note that the bmv2 is not intended to be a fast CPU target (i.e. run a P4 program fast), as the bmv2 is a BEHAVIROAL MODEL.
PISA Micro-Architecture
Parser:
Match-Action: See CAM/TCAMs.
Deparser:
Packet Scheduler: The first paper on this topic, PIFO @HotNets. The longer version was presented at the SIGCOMM conference, PIFO @SIGCOMM.
One alternative has been recently presented at SIGCOMM, PIEO.
Both works are open-source (code available on Github). While PIFO is designed to be implemented on an ASIC, PIEO targets FPGAs.
In-Network Computing
Programmable switches can be used as a computing platform for distribued applications.
A review of previous in-network computing works by the IETF COIN (Computing In the Network) group
Some applications offloaded on programmable switches were shown to be accelerated by up to two order of magnitude in terms of throughput, latency and power-efficiency.
However, multiple researcher raised concerns about offloading distributed applications on programmable switchs. Most notably, the following questions were raised. 1)How programmable switches should be used (vs can be used) 2)Which applications can benefits from in-network computing?
High-Level Synthesis
See LegUP, Xilinx Vivado HLS.
ahaHLS: An open source high level synthesis (HLS) tool using LLVM. Link The authors also presents the main ideas used in his tools in videos link to Youtube.
High Speed I/O Framework for Software Packet Processing
A tutorial on User Space Network Drivers
Netmap: A Novel Framework for Fast Packet I/O
Network Traffic Traces
Traffic traces can be obtained via CAIDA
Prefixes (IPv6 and IPv4) used in core networks can be extracted from BGP dumps available either on CAIDA, routeviews or on RIS. Multiple tools/script are available to read the BGP dumps and extracts any information hold in a BGP message.
Conferences / Journal
Do you want to publish to a conference not listed below? Double check the conference statistics on google scholar (under the metrics tab).
Networking
Transactions on Communications
P4 Workshops See the P4.org event section for the lastest P4 workshop.
Computer Architecture
FPGA
All remainings topics
ACM Transactions on Computer Systems (TOCS)
IEEE Transactions on Computers
Design Automation Conference (DAC)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Graduate Students Ressources
Reflexion on Research
Bibliography manager
Endnote
Zotero, a free an open-source blibliography manager. Link
Emacs
Reading a paper
We strongly advise you to take notes when you read a paper. The benefits are multiples: for your literature review, to fully understand an article, and to share with your colleagues!
Writting a Paper
General advices from a Microsoft researcher on writting a paper.
Books: The Chicago Manual of Style is a good reference to write a thesis, or a journal paper. However, more specifically for journal papers Writing Your Journal Article in Twelve Weeks, Second Edition is a very good reference on this topic.
Notes on the table presentation
We strongly encourage to write a scientific article using LateX. If you are note familiar with LateX we recommand to use the TexStudio LateX editor (available on many platforms).
Presenting a Paper
Beamer Presentation - Having fun!
How to Speak
Presenting your research on your website
Use one of the tow following framework Solo or Duo. Many other frameworks are available on Github (for your team, for blogging, etc.).
Religion - Emacs
Emacs is an editor that is highly recommanded to use as everything can be integrated within emacs (from note taking, latex writting, developpement, etc.). The learning curve is STEEP (though), but it is worth it!
In particular:
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to write LaTeX See the following overview and tutorial for latex, and a shorter but complementary tutorial. hen you install pdf-tools, follow this instructions
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Bibliography management wih ivy-bibtex combined to Zotero Follow this tutorial
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Take notes, organize them, GTD (Getting Things done) Packages to install: org-mode, org-notes, org-ref Org-mode is just ONE good reason to use emacs. See the following tutorials
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as an IDE (Python, C++, Lisp, VHDL, System Verilog, etc.)
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C++ IDE: Follow this tutorial, which helps you to configure and install cmake-ide
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Python IDE: Install and configure the Elpy package
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Git Integration. Magit is just mindblowing! See this youtube tutorial/demo. Another source of documentation for the basic feature and an overview