/sifive-blocks

RTL blocks compatible with the Rocket Chip Generator

Primary LanguageScalaApache License 2.0Apache-2.0

RTL Blocks for the Rocket Chip Generator

This repository contains RTL generators for a variety of IO peripheral blocks that are designed to be compatible with the Rocket Chip SoC Generator

This repository is a fork of https://github.com/sifive/sifive-blocks, which it replaces.