faiq-i
An Electrical Engineer with Computer Science and AI majors, I have special interests in the fields of Artificial Intelligence and Computer Architecture.
Lahore, Pakistan
Pinned Repositories
faiq-i
Config files for my GitHub profile.
riscv
A SystemVerilog implementation of a simple processor working for the RISC-V ISA. Currently, only the base instruction set is implemented fully and a UART peripheral is fitted in as well. Later extensions are ongoing and will be updated in this repository.
pak-rv-core
faiq-i's Repositories
faiq-i/riscv
A SystemVerilog implementation of a simple processor working for the RISC-V ISA. Currently, only the base instruction set is implemented fully and a UART peripheral is fitted in as well. Later extensions are ongoing and will be updated in this repository.
faiq-i/faiq-i
Config files for my GitHub profile.