Issue when compiling code with PandA 0.9.6

[martinwz]

I seem to be having an issue when trying to compile the following C file. Below is a working directory with the bambu log file, and I'm using the following version:
PandA 0.9.6 - Revision 5e5e306-main
The following C code should output 00000005. However, in bambu it seems to output ** fffffffd**.

int crc32_context;
void crc32_byte(int b) { crc32_context = b; }
int main (void)
{
    long val = 3140819082;
    crc32_byte(val >> 29);
    return crc32_context;
}

Overview of running the test-case

There are several files. Assuming the test-case is in s.c. The c testbench is in test_gen_gold.c. The verilog testbench is in tb.v. These files are in the same folder.

./s.c

int crc32_context;
void crc32_byte(int b) { crc32_context = b; }
int main (void)
{
    long val = 3140819082;
    crc32_byte(val >> 29);
    return crc32_context;
}

./test_gen_gold.c

#include <stdio.h>    
#include <math.h>
#include <stdint.h>
#include <inttypes.h>
unsigned int result();
int main () {
    unsigned int resultOut;
    resultOut = result();
    printf("checksum = %08X\n",resultOut);
    return 0;
}

./tb.v

module testbench;
   reg clock, reset, start_port;
   wire done_port;
   wire [31:0] return_port;
   main m(.clock(clock), .reset(reset), .start_port(start_port), .done_port(done_port), .return_port(return_port));
   always #10 clock = ~clock;
   initial begin
      clock = 0;
      reset = 0;
      start_port = 0;
      @(posedge clock) reset = 0;
      @(posedge clock) reset = 1; start_port = 1;
      @(posedge clock) start_port = 0;
   end
   always @(posedge clock)
     if (done_port) begin
        $display("checksum = %h", return_port);
        $finish;
     end
endmodule

First, running

 gcc s.c test_gen_glod.c -o test1 && ./test1 >out.gcc_line1.txt 

we can get gcc output: checksum = 00000005 in the out.gcc_line1.txt.

Second, running

 bambu s.c >bambu.log 2>&1
 iverilog top.v tb.v -o top 
./top >out.iverilog.txt

we can get bambu output: checksum = fffffffd in the out.iverilog.txt.

We also verified the results using ModSIM, but they were still inconsistent. So is this a bug in Bambu?

[Ansaya]

Dear martinwz,
the issue should now be solved. Please see the answare of #39 .