Sample RISC-V Libero project(s) for the PolarFire (MPF300T) Evaluation Kit.
This project contains a Libero project containing an FPGA design including a RISC-V RV32IM soft processor. Programming bitstreams are also included so that you do not need to run through the full FPGA design flow in order to start developping software for RISC-V.
The FPGA design includes the following features:
- CoreRISCV_AXI4 RV32IM RISC-V processor
- RISC-V debug block allowing on-target debug using openocd/GDB
- LSRAM for code/data
- User peripherals such as GPIO, Timers, UART
The memory map for each design is available within each Libero project.
Details of the features of PolarFire Evaluation kit are available here.
The Programming_The_Target_Device folder includes FlashPro Express projects that can be used to program the development boards FPGA. A standalone installer for FlashPro Express is available here. Please note that you only need to install this standalone version of FlashPro Express if you do not have Libero tools installed.
- PF_CoreRISCV_AXI4_BaseDesign, allows software debugging using FlashPro5. The same JTAG port is used for programming the FPGA and debugging RISC-V software.
- PF_CoreRISCV_AXI4_CoreBootStrap, allows software debugging using FlashPro5. This also allow for booting from SPI Flash.The same JTAG port is used for programming the FPGA and debugging RISC-V software.
The Modify_The_FPGA_Design folder contains Libero example designs. Libero is Microsemi's FPGA design tool. You will need this tool if you wish to modify the example FPGA designs. Libero is available from here.
A set of RISC-V example software projects are also available for these designs from the SoftConsole page.