fitlesscoward's Stars
Xilinx/Vitis-AI
Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.
Xilinx/Vitis-Tutorials
Vitis In-Depth Tutorials
Xilinx/Vitis-AI-Tutorials
Xilinx/SDSoC_Examples
Xilinx/LSTM-PYNQ
liangyihuai/deeplearning_liang
my deep learning time
feifengwhu/LSTM_on_FPGA
leisurelicht/wtfpython-cn
wtfpython的中文翻译/施工结束/ 能力有限,欢迎帮我改进翻译
Xilinx/SDSoC-Tutorials
SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials
jackfrued/Python-100-Days
Python - 100天从新手到大师
ysh329/embedded-ai.bi-weekly
WeChat: NeuralTalk,Weekly report and awesome list of embedded-ai.
changwoolee/lenet5_hls
FPGA Accelerator for CNN using Vivado HLS
dgschwend/zynqnet
Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"
dalmia/Deep-Learning-Book-Chapter-Summaries
Attempting to make the Deep Learning Book easier to understand.
Shikunliu/2D_Convolution_Vivado_HLS
ljpzzz/machinelearning
My blogs and code for machine learning. http://cnblogs.com/pinard
PharrellWANG/fdc_resnet_v3
Deep learning using residual neural network for fast depth coding in 3D-HEVC :clap: It is based on https://github.com/tensorflow/models/tree/master/research/resnet
tensorflow/models
Models and examples built with TensorFlow
awai54st/PYNQ-Classification
Python on Zynq FPGA for Convolutional Neural Networks
doonny/PipeCNN
An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
fengbintu/Neural-Networks-on-Silicon
This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.
fan-wenjie/LeNet-5
LeNet-5,Use C Program Language Without Any 3rd Library
ryangBUAA/MFQE
HEVC-Projects/CPH
A large-scale database for CU partition of HEVC (CPH), at both intra- and inter-modes.
tianyili2017/HEVC-Complexity-Reduction
Source programs to test the deep-learning-based complexity reduction approach for HEVC, at both intra- and inter-modes.
yuehniu/embeddedCNN
Deploy CNN accelerator in embedded OS using SDSOC and Xilinx Ultrascale+ ZCU102 platform.
Xilinx/CHaiDNN
HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
Zaoldyeckk/High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems using Vivado HLS. Now under 2018.2 version.
WalkerLau/Accelerating-CNN-with-FPGA
This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.
donnyyou/torchcv
TorchCV: A PyTorch-Based Framework for Deep Learning in Computer Vision