fserre/SGen
SGen is a generator capable of producing efficient hardware designs operating on streaming datasets. “Streaming” means that the dataset is divided into several chunks that are processed during several cycles, thus allowing a reduced use of resources. The size of these chunks is referred as the streaming width. It outputs a Verilog file that can be used for FPGAs.
VHDLGPL-3.0
Stargazers
- antsmnTurin, Italy
- catterys
- CuteSC2Germany
- damionfanUCAS
- ducklingQQ
- ElroriShanhai
- fifo727Korea
- hst10University of California, Irvine
- judah715
- Keriz
- KraksINRIA/ENS; Tufts
- kyal
- langzhiic
- louisinhitUSYD
- maltanar@AMD Research Labs
- Nekitoz
- nindanaotoKyoto University
- sergei-romanenkoKeldysh Institute of Applied Mathematics
- Shaan106Duke University
- xldeng-chnInstitute of Information Engineering, Chinese Academy of Sciences