.__ ._____. ____ _________ _| | |__\_ |__ / ___\\____ \ \/ / | | || __ \ / /_/ > |_> > /| |_| || \_\ \ \___ /| __/ \_/ |____/__||___ / /_____/ |__| \/ (personal) General purpose VHDL library. README Table of Contents 1. Module overview A. Directory structure/Module organization 1. Module overview freqDiv Frequency divider that generates a clock signal by dividing the input clock frequency by a user definable sampling factor. lcd Module to print data on HD44780 compatible LCDs of size 4(2)x40 (rows x columns). lcd_decoder_base Maps HEX codes from input vector to memory addresses of HD44780 compatible LCDs. par2spi Data generator that transforms parallel input data into a serial output bit stream using a SPI-like output interface. spi2par Data collector that transforms serial input into parallel output using a SPI-like input interface. vga_out* Very simple VGA drivers written in pure VHDL. There are separate modules for different screen resolutions and refresh rates. A. Directory structure/Module organization For VHDL module width name "<module>" (in src/ directory) place documentation/testbench files with filename prefix "<module>_" in the corresponding directories! example: src/spi2par.vhd VHDL module -> doc/spi2par_ctrlfsm.png tb/spi2par_tb.vhd tb/spi2par_tb.wcfg