ftorres16

ftorres16's Stars

• HumanSignal/label-studio

  Label Studio is a multi-type data labeling and annotation tool with standardized output format

  Language:JavaScript18.1k2.3k

• BrunoLevy/learn-fpga

  Learning FPGA, yosys, nextpnr, and RISC-V

  Language:C++2.5k238

• Twipped/InterviewThis

  An open source list of developer questions to ask prospective employers

  6.7k400

• huggingface/deep-rl-class

  This repo contains the syllabus of the Hugging Face Deep Reinforcement Learning Course.

  Language:MDX3.8k581

• IanTayler/fbsim

  Game-like football simulation environment for trying out AI ideas, written in Rust.

  Language:Rust13

• mhinz/vim-galore

  :mortar_board: All things Vim!

  Language:Vim script16.7k602

• iterative/dvc

  🦉 ML Experiments and Data Management with Git

  Language:Python13.6k1.2k

• munificent/craftinginterpreters

  Repository for the book "Crafting Interpreters"

  Language:HTML8.8k1k

• guzmanlopez/aws-data-downloader

  Download data from Automatic Weather Stations

  Language:R61

• neuromorphs/tonic

  Publicly available event datasets and transforms.

  Language:Python20246

• jeshraghian/snntorch

  Deep and online learning with spiking neural networks in Python

  Language:Python1.2k212

• chipsalliance/chisel

  Chisel: A Modern Hardware Design Language

  Language:Scala3.9k586

• myhdl/myhdl

  The MyHDL development repository

  Language:Python1k247

• zachjs/sv2v

  SystemVerilog to Verilog conversion

  Language:Haskell53252

• diwu1990/UnarySim

  This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top Pick for 2020.

  Language:SystemVerilog397

• olofk/edalize

  An abstraction library for interfacing EDA tools

  Language:Python622183

• olofk/fusesoc

  Package manager and build abstraction tool for FPGA/ASIC development

  Language:Python1.2k241

• lowRISC/riscv-isa-sim

  RISC-V Functional ISA Simulator

  Language:C147

• jlgrons/UofT-Beamer-Template

  Simple beamer template for U of T presenters.

  Language:TeX42

• lowRISC/ibex

  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

  Language:SystemVerilog1.3k515

• alexalex222/Beamer-template-uoft

  Beamer template for University of Toronto

  Language:TeX69

• adamsolomou/SC-DNN

  Stochastic Computing for Deep Neural Networks

  Language:Python288

• siliconcompiler/siliconcompiler

  Modular hardware build system

  Language:Python81883

• cdsgit/cdsgit

  Cadence Virtuoso Git Integration written in SKILL++

  Language:Shell14545

• gethugothemes/parsa-hugo

  Parsa is a personal blog theme powered by Hugo. It also can be used for portfolio website.

  Language:HTML157320

• PyHDI/Pyverilog

  Python-based Hardware Design Processing Toolkit for Verilog HDL

  Language:Python614169

• pulp-platform/pulpissimo

  This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

  Language:SystemVerilog373163

• pop-os/shell

  Pop!_OS Shell

  Language:TypeScript4.8k261

• material-shell/material-shell

  A modern desktop interface for Linux. Improve your user experience and get rid of the anarchy of traditional desktop workflows. Designed to simplify navigation and reduce the need to manipulate windows in order to improve productivity. It's meant to be 100% predictable and bring the benefits of tools coveted by professionals to everyone.

  Language:TypeScript7.3k183

• tryolabs/norfair

  Lightweight Python library for adding real-time multi-object tracking to any detector.

  Language:Python2.4k239