fwb04

fwb04's Stars

• AppFlowy-IO/AppFlowy

  Bring projects, wikis, and teams together with AI. AppFlowy is the AI collaborative workspace where you achieve more without losing control of your data. The leading open source Notion alternative.

  Language:Dart59.8k3613.2k4k

• lencx/ChatGPT

  🔮 ChatGPT Desktop Application (Mac, Windows and Linux)

  Language:Rust53.4k4491.1k6k

• forthespada/CampusShame

  互联网仍有记忆！那些曾经在校招过程中毁过口头offer、意向书、三方的公司！纵然人微言轻，也想尽绵薄之力！

  3.3k3719162

• darklife/darkriscv

  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

  Language:Verilog2.2k9440293

• ultraembedded/riscv

  RISC-V CPU Core (RV32IM)

  Language:Verilog1.3k5218242

• liangkangnan/tinyriscv

  A very simple and easy to understand RISC-V core.

  Language:C1.1k178192

• riscv-software-src/riscv-tests

  Language:C92378240477

• ultraembedded/biriscv

  32-bit Superscalar RISC-V CPU

  Language:Verilog9133025154

• ultraembedded/cores

  Various HDL (Verilog) IP Cores

  Language:Verilog723495215

• eminfedar/fedar-f1-rv64im

  5-Stage Pipelined RV64IM RISC-V CPU design in Verilog.

  Language:Verilog1988320

• open-neuromorphic/open-neuromorphic

  List of open source neuromorphic projects: SNN training frameworks, DVS handling routines and so on.

  19110225

• dyinnz/uniquecv

  A simple resume template written in LaTeX

  Language:TeX1733052

• lirui-shanghaitech/CNN-Accelerator-VLSI

  Convolutional accelerator kernel, target ASIC & FPGA

  Language:Verilog1733226

• ChFrenkel/ODIN

  ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.

  Language:Verilog17141052

• taoyilee/clacc

  Deep Learning Accelerator (Convolution Neural Networks)

  Language:Verilog1705160

• sfmth/OpenSpike

  Fully opensource spiking neural network accelerator

  Language:Verilog1343116

• jasonlin316/RISC-V-CPU

  A RISC-V 5-stage pipelined CPU that supports vector instructions. Tape-out with U18 technology.

  Language:Verilog1227127

• Fraunhofer-IMS/airisc_core_complex

  Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.

  Language:Verilog8310318

• ChFrenkel/ReckOn

  ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.

  Language:Verilog774018

• jerry-D/HedgeHog-Fused-Spiking-Neural-Network-Emulator-Compute-Engine

  HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx Kintex Ultra Plus brand FPGAs and embedded RISC-V as trainer.

  Language:Verilog564111

• metr0jw/Spiking-Neural-Network-on-FPGA

  Leaky Integrate and Fire (LIF) model implementation for FPGA

  Language:Verilog49204

• ChFrenkel/tinyODIN

  tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.

  Language:Verilog484010

• LCAI-TIHU/HW

  LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peripherals.

  Language:Verilog33217

• saunak1994/CyNAPSEv11

  The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL

  Language:Verilog324013

• jeshraghian/snn-accelerator

  Language:Verilog24111

• pulp-platform/sne

  Language:SystemVerilog17600

• DanielGerlinghoff/radix-encoding

  Framework for radix encoded SNN on FPGA

  Language:Tcl13103

• sfmth/iscas-snn-accelerator

  Language:Verilog8100

• colinshane/LIF_Neuromorphic

  some of our simulation codes for : A Low-Cost High-Speed Neuromorphic Hardware Based on Spiking Neural Network

  Language:Verilog7204

• scale-lab/ASPENN

  Language:MATLAB230