Pinned Repositories
alogic
Alogic is a Medium Level Synthesis language for digital logic that compiles into standard SystemVerilog.
alogic-playground
Cores-SweRV
SweRV EH1 core
flam3
the original fractal flame renderer and genetic language
ibex
Ibex is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, previously known as zero-riscy.
opentitan
OpenTitan: Open source silicon root of trust
slang
SystemVerilog compiler and language services
Surelog
SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
UHDM
Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
zsh-prioritize-cwd-history
Prioritizes history entries executed from the current working directory
gezalore's Repositories
gezalore/zsh-prioritize-cwd-history
Prioritizes history entries executed from the current working directory
gezalore/flam3
the original fractal flame renderer and genetic language
gezalore/alogic
Alogic is a Medium Level Synthesis language for digital logic that compiles into standard SystemVerilog.
gezalore/alogic-playground
gezalore/Cores-SweRV
SweRV EH1 core
gezalore/ibex
Ibex is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, previously known as zero-riscy.
gezalore/opentitan
OpenTitan: Open source silicon root of trust
gezalore/slang
SystemVerilog compiler and language services
gezalore/Surelog
SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
gezalore/UHDM
Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
gezalore/verilator
Verilator open-source SystemVerilog simulator and lint system
gezalore/verilator-dev
Developer setup for working on Verilator
gezalore/verilator_ext_tests
Extended and external tests for Verilator testing
gezalore/verisegf
gezalore/WebKit
Official git mirror of the WebKit repository, https://svn.webkit.org/repository/webkit, future canonical repository.
gezalore/WebKit-dev
gezalore/XiangShan
Open-source high-performance RISC-V processor
gezalore/zsh-autosuggestions
Fish-like autosuggestions for zsh
gezalore/zsh-history-substring-search
ZSH port of Fish shell's history search feature.