gideonly

gideonly's Stars

• scalesim-project/scale-sim-v2

  Repository to host and maintain scale-sim-v2 code

  Language:Python23299

• Dazhuzhu-github/systolic-array

  verilog实现TPU中的脉动阵列计算卷积的module

  Language:Verilog686

• abdelazeem201/Systolic-array-implementation-in-RTL-for-TPU

  IC implementation of Systolic Array for TPU

  Language:Verilog14824

• cameronshinn/tiny-tpu

  Small-scale Tensor Processing Unit built on an FPGA

  Language:Verilog12019

• omarelhedaby/CNN-FPGA

  Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database

  Language:Verilog39191

• flsgavin/Systolic-array-on-FPGA

  Systolic array acceleration model of CNN, DNN and other networks.

  Language:C++7

• chenwei0129/Systolic_Array_Based_on_Matrix_Multiplication_for_CNN

  Language:Verilog7

• hsiehong/tpu

  AIChip 2021 project, NCKU

  Language:Verilog11

• gju06051/TPU_HW_Verilog

  Language:Verilog12

• charley871103/TPU

  AI Chip project

  Language:Verilog106

• VincentWang1998/ai_on_chip_project1

  tpu-systolic-array-weight-stationary

  Language:Verilog182

• Oscarkai9139/AIC2021-TPU

  Language:Verilog63

• yuyuranium/FPGA-Project-2022-simple-tpu

  Systolic array based simple TPU for CNN on PYNQ-Z2

  Language:Jupyter Notebook213