gigantenbein

dbt-rules

Rules for the DBT build system

dma_ip_drivers

Xilinx QDMA IP Drivers

mempool

A 256-RISC-V-core system with low-latency access into shared L1 memory.

meow

Yet another modal editing on Emacs / 猫态编辑

pulp-riscv-binutils-gdb

ReVAE

Implementation of VAE with Reversible Blocks

stream-ebpc

Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Lukas Cavigelli, Georg Rutishauser, Luca Benini.

TorchVAE

UNet-Zoo

Different U-Net implementations featuring a vanilla U-Net, probabilistic U-Net and PHiSeg. Each with a reversible variant aswell.

verible

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

gigantenbein/UNet-Zoo

Different U-Net implementations featuring a vanilla U-Net, probabilistic U-Net and PHiSeg. Each with a reversible variant aswell.

gigantenbein/ReVAE

Implementation of VAE with Reversible Blocks

gigantenbein/dbt-rules

Rules for the DBT build system

gigantenbein/dma_ip_drivers

Xilinx QDMA IP Drivers

gigantenbein/mempool

A 256-RISC-V-core system with low-latency access into shared L1 memory.

gigantenbein/meow

Yet another modal editing on Emacs / 猫态编辑

gigantenbein/pulp-riscv-binutils-gdb

gigantenbein/stream-ebpc

Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Lukas Cavigelli, Georg Rutishauser, Luca Benini.

gigantenbein/TorchVAE

gigantenbein/verible

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server