Mojo-Full-Adder
Code for Mojo FPGA board in Lucid HDL. Full Adder unit with automated and manual testing circuit. Done for ISTD 50.002 Computation Structures.
Code for Mojo FPGA board in Lucid HDL. Full Adder unit with automated and manual testing circuit. Done for ISTD 50.002 Computation Structures.
Verilog
Code for Mojo FPGA board in Lucid HDL. Full Adder unit with automated and manual testing circuit. Done for ISTD 50.002 Computation Structures.