greatscottgadgets/bucatini
a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
PythonBSD-3-Clause
Issues
- 0
Implement GTP SerDes Backend
#4 opened by ktemkin - 0
Implement basic PIPE interface
#1 opened by ktemkin - 0
ECP5: update sphinx docs to reflect finished state once ECP5 support is complete
#15 opened by ktemkin - 1
- 0
ECP5: implement LFPS abstractions
#12 opened by ktemkin - 0
ECP5: get receive data alignment working
#11 opened by ktemkin - 0
ECP5: get CTC working
#14 opened by ktemkin - 0
ECP5: implement RxDetect abstractions
#13 opened by ktemkin - 0
- 0
Get PIPE interface "linking" with LUNA code
#7 opened by ktemkin - 0
USB3: create an enumeration reference test design
#17 opened by ktemkin - 0
Implement Xilinx GTX Backend
#5 opened by ktemkin - 0
Implement ECP5 backend
#2 opened by ktemkin - 0
- 0
- 0
- 0
Implement basic USB3 + ECP5 support
#3 opened by ktemkin - 0
USB3: create a bulk reference test design
#18 opened by ktemkin - 0
Set up sphinx documentation
#8 opened by ktemkin