Pinned Repositories
-
code,code,code.
AMBA_APB_SRAM
AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).
AMBA_AXI3
System Verilog and Emulation. Written all the five channels.
ARM_AMBA_Design
Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
awesome-SystemC-AMS
A curated list of SystemC-AMS resources
AXI_spec_chinese
AXI协议规范中文翻译版
gem5-gpu
learnsystemc
Learn systemC with examples
verilator
Verilator
xdupgthesis
[停止维护 请使用note286/xduts]西安电子科技大学研究生学位论文XeLaTeX模板
guoruixing1's Repositories
guoruixing1/-
code,code,code.
guoruixing1/AMBA_APB_SRAM
AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).
guoruixing1/AMBA_AXI3
System Verilog and Emulation. Written all the five channels.
guoruixing1/ARM_AMBA_Design
Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
guoruixing1/awesome-SystemC-AMS
A curated list of SystemC-AMS resources
guoruixing1/AXI_spec_chinese
AXI协议规范中文翻译版
guoruixing1/gem5-gpu
guoruixing1/learnsystemc
Learn systemC with examples
guoruixing1/verilator
Verilator
guoruixing1/xdupgthesis
[停止维护 请使用note286/xduts]西安电子科技大学研究生学位论文XeLaTeX模板