haroonshafique
RISC-V Processors Design Verification | Machine Learning Enthusiast | Python | C | Assembly | SystemVerilog | Linux | Bash
Lahore, Pakistan
haroonshafique's Stars
Genymobile/scrcpy
Display and control your Android device
troyguo/awesome-dv
Awesome ASIC design verification
riscv-software-src/riscv-config
RISC-V Configuration Validator
kcelebi/riscv-assembler
RISC-V Assembly code assembler package for Python.
wallento/riscv-python-model
Python Model of the RISC-V ISA
jerry-jho/pyriscv
A RISCV Emulator written in Python
metastableB/RISCV-RV32I-Assembler
A simple, easily extendable, RISCV assembler for the RV32I subset in Python.
0xDeva/ida-cpu-RISC-V
RISCV-V disassembler for IDA Pro
merledu/Buraq-compressed-assembler
This is the compressed assembler for RISC-V.
Mr0maks/rvvm_old
RISC-V Virtual Machine