/AXI_Stream

AXI Stream

Primary LanguageSystemVerilogMIT LicenseMIT

AXIS

AXI Stream

AXI Stream master block, which will be used in AXI Lite protocol AXI Stream slave block, which will be used in AXI Lite protocol

There are 2 test-benches a) one tb contains single AXIS master, standalone simulation b) second tb, contains AXIS slave and master connected simulation. The AXIS master send stream to axis slave