/fpga-network-stack

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

Primary LanguageC++BSD 3-Clause "New" or "Revised" LicenseBSD-3-Clause

RoCEv2 Network Stack at 100Gbit/s for Alveo FPGAs

Go to RoCE v2 folder to understand and simulate the rocev2 IP.

The original repository is here. Compared to the original project:

  • Several small bug are fixed
  • Alevo U280/U250 support are added
  • RoCE v2 test code are simplified, test packets are provided
  • RoCE packet headers are explained