hfutwqz

hfutwqz's Stars

• git/git

  Git Source Code Mirror - This is a publish-only repository but pull requests can be turned into patches to the mailing list via GitGitGadget (https://gitgitgadget.github.io/). Please follow Documentation/SubmittingPatches procedure for any of your improvements.

  Language:C52.4k25.6k

• leiurayer/downkyi

  哔哩下载姬downkyi，哔哩哔哩网站视频下载工具，支持批量下载，支持8K、HDR、杜比视界，提供工具箱（音视频提取、去水印等）。

  Language:C#21k2.3k

• XduDavid/MIPS_CPU

  第一个CPU项目

  Language:Verilog61

• riscv-mcu/e203_hbirdv2

  The Ultra-Low Power RISC-V Core

  Language:Verilog1.3k341

• balanx/SpinalHDLDemo

  Demo Sources for Learning Spinal HDL

  Language:Verilog122

• skywind3000/awesome-cheatsheets

  超级速查表 - 编程语言、框架和开发工具的速查表，单个文件包含一切你需要知道的东西 :zap:

  Language:Shell11.2k2k

• WilsonChen003/HDLGen

  HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded functions, with ZERO learning-curve

  Language:Verilog8624

• zhutmost/spinalhdl-template

  Mill template for beginning your SpinalHDL project

  Language:Scala8

• HonkW93/automatic-verilog

  automatic-verilog based on vimscript

  Language:Vim Script23771

• WangXuan95/FPGA-SDcard-Reader-SPI

  An FPGA-based SD-card reader via SPI bus, which can read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器(通过SPI总线)，可以从FAT16或FAT32格式的SD卡中读取文件。

  Language:Verilog7719

• sipeed/TinyMaix

  TinyMaix is a tiny inference library for microcontrollers (TinyML).

  Language:C901143

• ENJOU1224/RV32I_Course_Design

  Language:Verilog7

• WangXuan95/FPGA-CAN

  An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。

  Language:Verilog21867

• WangXuan95/FPGA-DDR-SDRAM

  An AXI4-based DDR1 controller to realize mass, cheap memory for FPGA. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。

  Language:Verilog14331

• raspberrypi/pico-setup

  Language:Shell9343

• ARM-software/Arm-2D

  2D Graphic Library optimized for Cortex-M processors

  Language:C29565

• Wave-Insight/wave-insight

  Language:Rust71

• alexforencich/verilog-axi

  Verilog AXI components for FPGA implementation

  Language:Verilog1.5k447

• GreenWaves-Technologies/gap_sdk

  SDK for Greenwaves Technologies' GAP8 IoT Application Processor

  Language:C13977

• jofrfu/tinyTPU

  Implementation of a Tensor Processing Unit for embedded systems and the IoT.

  Language:VHDL39361

• raysalemi/Python4RTLVerification

  Language:Jupyter Notebook12028

• hfutwqz/SpinalTemplateSbt

  A basic SpinalHDL project

  1

• WangXuan95/BSV_Tutorial_cn

  一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开发的优势。

  Language:Bluespec50842

• antmicro/usb-test-suite-build

  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores

  Language:Shell5010

• WangXuan95/FPGA-USB-Device

  An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。

  Language:Verilog601101

• babysor/MockingBird

  🚀AI拟声: 5秒内克隆您的声音并生成任意语音内容 Clone a voice in 5 seconds to generate arbitrary speech in real-time

  Language:Python35.2k5.2k

• JF-Tan/Takk_Zynq_Labs

  This is just for Takk_Zynq_Labs test.

  Language:C26

• chengquan/IC_FLOW

  Language:Verilog113

• jackfrued/Python-Core-50-Courses

  Python语言基础50课

  11.6k2.9k

• jackfrued/Python-100-Days

  Python - 100天从新手到大师

  Language:Python156k52.3k