Formal Protocol Implementation Verification of the Off-Chip Communication
Full implementation: bsg_link.
Simulation: bsg_network_test.
To run the simulation, you still have to
- Comment out "export BSG_CADENV_DIR =
$(dir)/bsg_cadenv" and "include $ (BSG_CADENV_DIR)/cadenv.mk" - Replace "$(VCS_BIN)/vcs" with your own VCS paths.
- Install ILANG
- Generate verification targets for the implementation
mkdir -p build && mkdir verification && cd build
cmake .. && make
./BSGOFFCHIPExe
- Open JasperGold and go into the generated instruction folder
cd $TOP_DIR/verification/Output0_p
source do.tcl
To Set up the clock, you may need
clock -clear; clock clk; clock clk __ILA_I_core_clk 2 1