Pinned Repositories
axi_spi_master
Chebble
Cheating watchapp for Pebble Smartwatch 2
ChibiF3-Template
ChibiOS STM32F3 Template project
edison
Keyword Spotting on Microcontroller
ezrlc
calculating equivalent circuits based upon touchstone impedanze measurements
formulasheets
A collection of formula sheets and summaries from my time at ETH Zurich
stefanieundnoah.ch
huettern's Repositories
huettern/edison
Keyword Spotting on Microcontroller
huettern/formulasheets
A collection of formula sheets and summaries from my time at ETH Zurich
huettern/stefanieundnoah.ch
huettern/axi_spi_master
huettern/portfolio
huettern/trainingsplan
huettern/VeilAway
Our contribution to HackZurich 2020
huettern/axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
huettern/beeblebrox.ch
huettern/common_cells
Common SystemVerilog components
huettern/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
huettern/cva6-sdk
CVA6 SDK containing RISC-V tools and Buildroot
huettern/cvfpu
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
huettern/dace
DaCe - Data Centric Parallel Programming
huettern/keras
Deep Learning for humans
huettern/linux
Linux kernel source tree
huettern/memora-rs
Memora: Build Artifact Cache for Git Repositories
huettern/nemo
NEural Minimizer for pytOrch
huettern/opensbi
RISC-V Open Source Supervisor Binary Interface
huettern/python-deltasigma
A port of the MATLAB Delta Sigma Toolbox based on free software and very little sleep
huettern/riscv-dbg
RISC-V Debug Support for our PULP RISC-V Cores
huettern/riscv-isa-sim
Spike, a RISC-V ISA Simulator
huettern/riscv-opcodes
RISC-V Opcodes
huettern/signalflowgrapher
This Python tool allows you to draw signal-flow graphs, calculate transfer functions (SymPy code is generated for further use in Jupyter notebooks), do graph manipulations (e.g., node elimination and graph transposition), and save a graph as TikZ for use in LaTeX documentation.
huettern/snitch
Lean but mean RISC-V system!
huettern/snitch-llvm
huettern/tux-on-zynq
Experimenting eith Linux on Xilinx Zynq SoC with command line tools and as vanilla as possible
huettern/u-boot
Unofficial development fork of U-Boot
huettern/unified-targets
Target configurations for Betaflight Unified Targets
huettern/zynq-sandbox
Projects with the Xilinx Zynq-7000 Series SoC