/VerilogCodeECC

Research Interan@BARC FPGA based High-Throughput Generic ECC Implementation in Binary Extension Field

Primary LanguageJupyter Notebook

Contributed to the development of a Verilog module for FPGA-based High-Throughput Generic ECC Implementation in Binary Extension Field.

My contribution includes

• Design and analysis of 128 bit Hybrid Karatsuba Ofman Combinational Multiplier.

• Development of Generic Point Addition, Point Doubling, and Scalar Multiplication Module

• Development of ECDSA host Library

Guides : Abhishek Bajpai, Scientific Officer at BARC

          Saket Saurav, Research Engineer at IIITDM Jabalpur